DFT is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in digital systems inclusive of emerging technologies. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field. All aspects of design, manufacturing, test, reliability, and availability that are affected by defects during manufacturing and by faults during system operation are of interest.

The preliminary technical program is available at http://www.dfts.org/program.htm

Early registration deadline: August 31.
More details are available here: http://www.dfts.org/registration.htm

A block of rooms has been reserved at the Hotel UMass at a special conference rate ($140/night).
Room reservation deadline: September 10.
Further details are available at http://www.dfts.org/accommodation.htm

General co-chairs:

• Sandip Kundu (University of Massachusetts - Amherst, USA - kundu@ecs.umass.edu)
• Salvatore Pontarelli (CNIT, Italy - pontarelli@ing.uniroma2.it)

Program co-chairs:

• Omer Khan (University of Connecticut, USA - omer.khan@engr.uconn.edu)
• Maria K. Michael (University of Cyprus, CY - mmichael@ucy.ac.cy)

Industrial liasons chairs:    

• Prashant Joshi (Cadence, USA - prashant.joshi@gmail.com) -

Publicity chair:    

• Antonio Miele (Politecnico di Milano, Italy - antonio.miele@polimi.it) -

Publication chair:    

• Qiaoyan Yu (University of New Hampshire, USA - qiaoyan.yu@unh.edu)

Program Committee

• L. Anghel, TIMA, FR
• C. Bolchini, Politecnico di Milano,IT
• G. Chapman, Simon Fraser University, US
• Y. Choi, Hongik University, KR
• R. Cideciyan, IBM, CH
• A. Daniel, Intel Corporation, US
• S. Das, ARM, UK
• L. Dilillo, LIRMM, FR
• J. Dworak, Southern Methodist University, US 
• M. Ebrahimi, KTH Royal Inst.Technology, SE 
• B. Eklow, CISCO, US
• O. Ergin, TOBB University, TR
• A. Evans, IROC Technologies, FR
• M. Fukushi, Yamaguchi University, JP
• D. Gizopoulos, University of Athens, GR
• J. Han, University of Alberta, CA
• C. Huang, National Tsing Hua University, TW 
• W. Jone, University of Cincinnati, US
• A. Joshi, Boston University, US
• P. Joshi, Cadence, US
• A. Kanuparthi, Intel Corporation, US
• N. Karimi, NYU Polytechnic, US
• R. Karri, NYU Polytechnic, US
• M. Kermani, Rochester Inst. Technology, US 
• Y. Kim, Northeastern University, US
• I. Koren, Univ. of Massachusetts-Amherst, US 
• R. Leveugle, TIMA, FR
• H. Li, Chinese Academy of Science, CN
• F. Lombardi, Northeastern University, US
• C. Metra, University of Bologna, IT
• A. Miele, Politecnico di Milano, IT
• K. Namba, Chiba University, JP
• N. Nicolici, McMaster University, CA
• C. Nicopoulos, University of Cyprus, CY
• M. Ottavi, Univ. of Rome Tor Vergata, IT
• N. Park, Oklahoma State University, US
• A. Paschalis, University of Athens, GR
• Z. Peng, Linkoping University, SE
• W. Pleskacz, Warsaw Univ of Technology, PL 
• I. Polian, University of Passau, DE
• I. Pomeranz, Purdue University, US
• M. Psarakis, University of Piraeus, GR
• P. Rech, UFRGS, BR
• S. Reda, Brown University, US
• S. Reddy, University of Iowa, US
• P. Reviriego, Universidad Nebrija, ES
• D. Rossi, University of Southampton, UK
• F. Salice, Politecnico di Milano, IT
• Y. Sazeides, University of Cyprus, CY
• M. Schölzel, Universität Potsdam / IHP, DE
• S. Shazli, EMC Corporation, US
• O. Sinanoglu, N.Y.U. Abu Dhabi, AE
• V. Sridharan, AMD, US
• M. Tehranipoor, University of Connecticut, US 
• C. Thibeault, Ecole de Tech. Superieure, FR 
• N. Touba, University of Texas at Austin, US 
• S. Tragoudas, S. Illinois Univ Carbondale, US 
• L. Wang, University of Connecticut, US
• X. Wen, Kyushu Institute of Technology
• D. Xiang, Tsinghua University, CN
• Q. Yu, University of New Hampshire, US

The IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).